Enable C++ based diagnostics to be run as patterns on Automated Test Equipment (ATE) Run and debug simulations based on these patterns for hardware developed in Verilog Debug waveforms in Verdi Run emulation on FPGA platforms for these patterns Collaborate closely with design and diagnostics teams to understand and adapt C++ diagnostic algorithms for effective ATE testing

Prep devices to the engineers' specifications in a timely fashion Become the subject matter expert in the sample prep process and tools for the lab Interface with sample prep tool vendors for repairs, preventative maintenance, and to evaluate new tools when needed Collaborate with engineering staff to perform non routine experiments involving sample prep Keep track of lab

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

The position entails developing and managing strong partnerships with C suite level and senior business/regional leaders, while developing and delivering comprehensive external and internal communication strategies in support of thought leadership, brand recognition, and employee engagement. PREFERRED EXPERIENCE Narrative development, in alignment with corporate strategy

Work with the Data Fabric architects and the chip floorplanning team to develop a custom Data Fabric topology Synthesize Data Fabric IP using Synopsys tools and work with the micro architects to ensure the design components meet the project's area, power, and performance goals Provide feedback to RTL team to resolve timing, power, area, LINT, DFT, and cross clock domain i

Working on Adaptive Clock Generators for CPU and/or GPU applications, custom mixed signal circuits and logic design in advanced CMOS technologies using custom and semi custom design flows Design and Simulate Power Management Circuit Architectures on System level, RTL level and on Transistor level using Matlab, SystemVerilog, Verilog, Verilog A and Hspice Design, simulate,

Decode Technical documentation and deploy Software Development Kit using the documentation. Work closely with various stakeholders to take feedback on the documentation. Port High Performance computing application on ROCm using the documentation. Design, develop and deploy testing tools and automation libraries necessary to perform testing of SDK documents. Lead the adopt

Lead technical presentations demonstrating a good understanding of application, data, infrastructure, architecture expertise and application systems design Collaborate with infrastructure architects and be responsible for the defining designing delivering of the technical architectures, patterns, technical quality, risks, fitness for purpose and operability of technical a

Memory Sub system Validation Lead's responsibility includes all aspects of pre and post silicon validation from planning, execution and debug. Develop and execute test plans for HBM Functional and Electrical Validation (PVT Shmoo Characterization). The sought after candidate possess extensive knowledge of high bandwidth memory subsystem, including SoC memory architecture,

Extraordinary leadership skills and ability to inspire team members with an innate ability to see the bigger picture. Excellent debugging skills. Proven ability to drive resolution of critical problems, while under pressure. Ability to understand complex technical discussions, extract action plans, and to succinctly summarize complex details for executive reporting Abilit

Implement good DevOps practices and maintain tools and infrastructure that enable our teams to deliver high quality software reliably and efficiently. Collaborate with infrastructure architects and be responsible for the defining designing delivering of the technical architectures, patterns, technical quality, risks, fitness for purpose and operability of technical archit

Driving technical innovation to improve AMD's capabilities a cross validation, including tool and script development, technical and procedural methodology enhancement, and various internal and cross functional technical initiatives Manage a high performance team of debug engineers that work directly on customer/partner systems as well as internal reference platforms Arbit

Work as part of AMD's GPU Architecture and Performance Team to develop future AMD products. Run simulation models for new products and analyze results to characterize both the product and workloads. Keep abreast of new workloads, particularly for AI models'. Collaborate closely with hardware architects, system engineers and business teams in evaluating and understanding p

Support data center marketing leads on programs; partner with COEs (Centers of Excellence) and stakeholders to carry out projects. Develop and maintain detailed comprehensive program plans, including creating a unified calendar, timelines, deliverables, milestones, resource allocation, and drive a feedback loop to improve future programs. Lead end to end and day to day ma

Work on architecture, feasibility, design, and system integration of high performance LDO designs for AMD products Work with the rest of the LDO and other AMD design teams to maintain this roadmap and implement in AMD products Provide mentorship as a technical leader for designers in the LDO design team Align and contribute to AMD methodologies, and the wider analog desig